In British Patent No. GB-A-2311882, a multithreaded processor is described. A single processing unit has a plurality of inputs and outputs, corresponding to a plurality of processing threads which are to execute on the processor. The processor arbitrates between the threads to determine which one should be executed on each block cycle. This process is typically done on a prioritization basis. Further, the development of this process has concerned about monitoring factors such as time since execution starts for a thread, and time to a specific deadline when the thread must execute. This idea can be embodied in processors directed to a general processing, and also in application specific processors such as Digital Signal Processors (DSP).
A number of different threads can be arranged to execute on one of these processors, but DSPs typically use between two and four threads. The number of threads is defined at the design and manufacture stage of the chip, and the chip is configured with an appropriate number of inputs and outputs.
A typical processor uses a 32 bit instruction set which may be extended via template instructions used to retrieve additional instructions.
Some processors (not multithreaded) have been produced with smaller than standard instruction sets. This leads to a reduction in the code size of a program used by such a processor. The processor will be configured to switch between the large and the reduced instruction sets using special instructions. Each time a new instruction set is added, additional switching instructions have to be added to have the new instruction set accessed.
Many applications to which multithreaded processors can be put include embedded and low power requirements. Such requirements constrain the amount of memory available in the systems for data such as programs. As a result, microprocessor manufacturers have aimed to improve their devices by compressing program code. This is most commonly achieved by supporting instruction subsets which can be implemented when a smaller instruction set is required. For example, a processor with the 32 bit instruction set may also be able to support a special 16 bit instruction set to make the programs smaller.
Again, the switch between the instruction sets is handled by use of the special instruction to switch between the sets. The switch requires the special instruction and an additional clock cycle to perform the switching.